Q&A#06- How can I generate a new clock from a reference clock?
Released Friday, 1st March 2019
Good episode? Give it some love!
Q&A#06- How can I generate a new clock from a reference clock?
Q&A#06- How can I generate a new clock from a reference clock?
Friday, 1st March 2019
Good episode? Give it some love!
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I receiver a question from Sandip. He got my reference, from my post on DDS.
The question is:
“I want to generate Square of 999kHz, 1000kHz and 1001kHzin VHDL Language and that would be implemented on a Zynq ZC702 evaluation board.
Is it possible by using the DDS.? Can you provide your expertise and comment on it.”
Website
https://surf-vhdl.com
Telegram channel
https://t.me/SurfVhdl
You can contact me
mail: [email protected]
Telegram:
https://t.me/francesco_surfvhdl
Teachable courses
https://surf-vhdl.link/courses
Music by Francis Preve - https://www.francispreve.com
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